6522 VIA Timer 1 One-Shot

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6522 VIA Timer 1 One-Shot

This post covers part of my exploration of the 6522 VIA.  The base system is a WDC65C02, 32K RAM, 8K ROM and a 16 x 2 line LCD display.

Objectives

  • Setup timer 1 in ones-shot mode
  • Begin to understand the capabilities and applications of a 6522 VIA
  • Try out interrupt generation and interrupt processing

Approach

The base system provided address decoding logic that allowed me to use a block of 16 addresses from $8010 to $801F to map onto the 16 registers of the 6522






This is how the device is connected into my 65C02 system:








Timers

There are two timers with slightly different features - in this post we'll look at Timer 1 in one-shot mode.  Timer 1 is a 16 bit counter that can operate in two modes - continuous or one-shot.  In one-shot mode timing is:

      total cycles = n + 1.5         where n is the 16 bit value loaded

When the counter reaches zero the interrupt flag is set.  Another count is initiated by loading a new value into T1CH:

T1 has 4 associated registers:
    T1CL        low byte of 16 bit count value
    T1CH        high byte of 16 bit count value
    
    T1LL        low byte of 16 bit latch
    T1LH        high byte of 16 bit latch

The latch holds data waiting to be loaded into the counter.  A simple load sequence could be:
    Load T1CL with low byte
    Load T1CH with high byte.  Countdown begins

    Counter reaches zero + 1.5 clock cycles - count stops and IFR is set

Using the latch:
    Load T1LL with low byte
    Load T1CH with high byte - low byte is transferred from latch and countdown begins

    Counter reaches zero + 1.5 clock cycles - count stops and IFR is set

T1LL can be loaded ready for a new countdown during a running count.

This timer can be configured to output a pulse on PB7: when the count commences PB7 goes low and stays low until T1 reaches n + 1.5 clock cycles.

Here is a simple assembler program used to verify timings in one-shot mode:


This example starts with a count of 20; each time T1 reaches zero the interrupt flag is set and IRQB goes low.  The 65C02 services this interrupt request by re-loading T1 with the previous value minus 4.  After the count from 4 is completed the next value is back to 20.   The results below show the timing of two PB7 pulses - counting from 8 and then from 4.

The time between PB7 going high and at the end of one count and going low at the beginning of the next is the time taken for the ISR to run.

Result for Timer 1 - One-shot






Here is an oscilloscope trace showing Timer 1 completing two short counts.  The first count starts from 8, when PB7 goes LOW.  After n + 1.5 cycles PB7 returns to HIGH.  Thus Timer 1 could be used to generate pulses of any width on PB7.

The second count starts from 4 so completes in 4 + 1.5 clock cycles.



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